The world's first 3nm chip, officially released

 


Although TSMC's 3nm chips have been mass-produced, as of yesterday, we have not seen chip companies release related products. Today, this situation has finally been broken.


U.S. chip company Marvell said it has officially released a data center chip based on TSMC's 3nm process. According to Marvell, the company's industry-first silicon building blocks in this node include 112G XSR SerDes (serializer/deserializer), Long Reach SerDes, PCIe Gen 6 / CXL 3.0 SerDes and 240 Tbps parallel chip-to-chip interconnect .


In fact, long before #TSMC announced 3nm mass production, Samsung had already announced that it had achieved mass production of 3nm process.


In June 2022, #Samsung announced that it had started initial production at a 3nm process node using a GAA transistor architecture. The multi-bridge channel FET (MBCFET) used in it is Samsung's first GAA technology, which breaks through the performance limitations of FinFETs, improves power efficiency by reducing power supply voltage levels, and improves performance by increasing drive current capability. The company is also beginning to use nanosheet transistors with semiconductor chips for high-performance, low-power computing applications, with plans to expand to mobile processors.


Samsung said utilizing the company's proprietary technology to utilize nanosheets with wider channels enables higher performance and higher energy efficiency compared to GAA technology using nanowires with narrower channels. Using 3nm GAA technology, Samsung will be able to adjust the channel width of the nanosheets to optimize power consumption and performance to meet various customer needs.


In addition, the design flexibility of GAA is very conducive to design technology co-optimization (DTCO), which can help improve power, performance, area (PPA) advantage. Compared with the 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23%, and reduce area by 16%, while the second-generation 3nm process can reduce power consumption by up to 50% and improve performance by 30% %, the area is reduced by 35%.


Although both Samsung and TSMC have spent a lot of thought on 3nm, it can be seen from past news and manufacturers' announcements that it seems that everyone is not interested in the first-generation 3nm process. In addition to these two foundries, Intel is also reportedly launching its 3nm process node by the end of 2023. And they seem to have set their sights on 2nm.


At that time, Intel 20A (2nm) will usher in the Angstrom era, using GAA (RibbonFET) transistors and PowerVia technology to improve power retention. Intel rival TSMC will adopt GAA at its 2nm node in 2025, giving chipmakers a head start when they hit the limits of miniaturization. Plus Japanese start-ups Rapidus and Samsung, which will have a 2nm prototype line in 2025.

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